NXP Semiconductors /MIMXRT1052 /FLEXSPI /MCR1

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Interpret as MCR1

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0AHBBUSWAIT0SEQWAIT

Description

Module Control Register 1

Fields

AHBBUSWAIT

AHB Read/Write access to Serial Flash Memory space will timeout if not data received from Flash or data not transmited after AHBBUSWAIT * 1024 ahb clock cycles, AHB Bus will get an error response

SEQWAIT

Command Sequence Execution will timeout and abort after SEQWAIT * 1024 Serial Root Clock cycles

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